Hunt Engineering ResOurce Node Specification
(HERON)

See our HERON product information page for details of all HERON modules available - these include HERON C6000, HERON-FPGA, and  a wide range of I/O modules.

Introduction

Purpose

Having been successful in developing modular solutions for Real Time DSP, over a period of some ten years, HUNT ENGINEERING wanted to have a module standard suitable for use with today’s High specification DSPs like those in the C6000 platform from Texas Instruments (TI).

We are able to learn from other module standards like the TRAM standard from INMOS and the TIM-40 specification, (which we had some influence over), published by TI. We need to take on board the advantages of these past standards, and to consider the problems we have encountered in using those standards over our ten-year history.

The first thing is that both of the module specifications named above were processor specific. This gives problems in two areas; the module is specified to always have a processor (making it difficult to have modules without one) and it was not possible to update the processor type used in a system without switching to a completely new board set.

What we aim to do with the HERON modules is to provide a module format that can truly provide nodes in a nodal system, i.e. there is no advantage or disadvantage to having a processor on a particular module. We also want to provide a module that can grow with our requirements into the future. This is both in terms of choosing different processor types, and in terms of allowing greater performance as silicon chip technology moves on (as it inexorably does).

To achieve this we will use a FIFO interface. There will be a FIFO (or FIFO like) component on the module carrier board directly connected to the module sockets. The module will simply access that synchronous FIFO interface by supplying a FIFO clock of its own choosing, and then using read and write enables and flags to determine when data can be received or sent.

In fact HUNT ENGINEERING have had such an interface before, used for the GDIO modules. The HERON specification is an enhancement of that GDIO specification, and the legacy GDIO modules can be used in a HERON socket, with some restrictions on functionality.

Another thing that we have learnt from the previous module specifications is that a modular system must pay attention to mechanical stability if it is to remain reliable throughout its life. The HERON module therefore has four fixing holes per module, and uses a very robust connector.

Capabilities

The HERON module is capable of transferring data in both directions simultaneously, in either a 32- bit word width, or operating in a legacy 16 bit mode. The module itself will control the speed of the transfer, as it provides the clocks for the synchronous FIFOs. The limit in speed, however, is the commercial availability of FIFO-like devices (perhaps FPGA implementations of FIFOs in some cases). Initial designs are based on the availability of 67 to 100 MHz parts in 1998, allowing 264 and 400 Mbytes/second simultaneously in and out! It is unlikely that any nodes will actually be able to use bandwidths that high for some time to come.

Is it a standard?

Well that depends on your definition of a standard. It is published freely in this document, available from a number of sources. For example, the latest version will always be available from this web site.

It is not and will not, however, be registered or adopted by a standards-raising body.

The interface to the module carrier is fully defined in this document, allowing modules or carriers to be designed by parties other than HUNT ENGINEERING. While HUNT ENGINEERING will not offer any validation of second or third party designs we will, as always, endeavour to support our customers fully in what they are trying to do. All we ask is that you discuss what you are trying to do with us at the outset so that we have the chance to make suggestions and recommendations.

Our business is based around supporting the future of our customers, and making it easy to progress from one stage of a project to the next. This means that it is a primary goal of ours to continue to use the same module specification unchanged. It may be necessary, however, to enhance or extend this specification to cater for eventualities that we have not foreseen. In this case we will strive to maintain backward compatibility so that older HERON products will always be useable in our systems. This however is not a commitment to do so, and HUNT ENGINEERING cannot accept any liability for problems caused by changes made to this specification.

Schematic of the HERON module interface

Major interfaces on the HERON module

FIFOs

The main interfaces on the HERON module are the FIFO interfaces. This specification allows for six FIFOs in each block, that is, six input and six more for output. In this specification input FIFO will always refer to those used for providing data to the module. Following that all references to output FIFO will refer to those used to accept data from the module.

It is important to remember at all times that the actual FIFO component is fitted to the module carrier board, NOT the module.

JTAG (IEEE 1149.1 test bus)

There is a JTAG chain allowed for on the module carriers that will pass the JTAG serial TDI/TDO chain through each module on the carrier. If there is no module fitted to the module site, or a module is fitted that does not assert the presence detect signal, the module carrier will ensure that the TDI/TDO connection is made for that module site.

Power Supply

While it is recognised that technology today is demanding lower and lower supply voltages like 3.3v and 2.5v, it has been decided that HERON modules should provide these supplies themselves as and when required. The HERON module provides the +5v and +-12V available to almost all of the standard Card formats in use today (ISA/PCI/VME/cPCI etc)

This means that I/O modules can generate their own regulated and smoothed power planes if required by the logic. Analogue I/O for example would follow this example. Processor modules can generate whatever voltages the processor and associated logic requires. This allows for the use of future technology without needing to change the HERON module specification, or Carrier board design.

General module control

There are some general control signals like reset and config. They are each described separately in a later section of this document. There is a also a serial configuration bus, that allows any module to address any other module. This can then be used to transfer slow configuration type information.

Uncommitted Module interconnect

Sometimes direct connections are desirable between modules, e.g. for using processor timer pins to clock I/O modules, using I/O modules to interrupt processors etc.

Therefore the HERON spec allocates some pins that are simply connected together on all module sites of that carrier. They are not buffered or committed to a particular function, but are simply there for certain application modules to use as they see fit.

HERON physical specification

The HERON connectors are chosen to be a superset of the 2^nd generation GDIO module connectors, which we describe as "Synchronous GDIO". These connectors are quite high-density while retaining robustness.

The Module carrier provides four 54pin sockets, which are 2mm pitch connectors like part numbers SMM-127-01-S-D from Samtec Inc. The legacy 50 way GDIO connectors will also fit these larger connectors.

The HERON Module uses four 54 pin headers which are 2mm pitch, like part numbers TMM-127-03-G-D from Samtec Inc.

When mated these parts give a board to board spacing of 6mm.

HERON module dimensions

The above drawing shows the required physical dimensions of a HERON module. The drawing shows the position of four fixing holes, and four 54-way connectors.

This is an extract of the full HERON specification document.