Connecting the PowerPC Processor to Hardware

The HERON-FPGA12 has a  Virtex^®-4 FX device which consists of an FPGA with a PowerPC^® 405 processor embedded in it. This example looks at how the PowerPC^® and FPGA can be used together to make best use of the power of each. The PowerPC provides many different interfaces. System performance can be affected by different design choices. The example connects a hardware FFT to the PowerPC so that it can be used as a hardware acceleration block. The example project combines the PowerPC and FPGA by implementing a CoreGen^® FFT component in the FPGA. The PowerPC^® feeds the FFT component with data and also controls and monitors the operation of that logic.  Source code for four different design strategies for implementing this are provided and the performance that can be expected from them is discussed.

This framework can also be used to implement many other types of FPGA function block.

HERON-FPGA12 User Manual

Print friendly version of HERON-FPGA12 Datasheet

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